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FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
SD = 0
V IN < 3.0 V
V OUT2 <=V UVF2
V OUT2
Under-voltage
V OUT1 =ON
V OUT2 =ON
PG = 1
V OUT2 >=V OVR2
V OUT2 =>=V UVR2
V OUT2
Over-voltage
Shutdown
F SW is programmed
V OUT1 = Discharge
V OUT2 = Discharge
PG = 1
SD =1
Power Off
V OUT1 =OFF
V OUT2 =OFF
PG = 1
3.0 V<=V IN <=6.0 V
V OUT1 <=V OUT1
V OUT1
Under-voltage
V OUT1 =ON
V OUT2 =ON
PG = 1
V OUT1 >= V UVR1
V OUT1 >=V OVR1
V OUT2 <=V OVF2
V OUT1 <= V OVF1
T J >=170°C
T IMEOUT Expired
T IMEOUT
I OUT1 >=I LIM1
V OUT1 =ON
V OUT2 =ON
PG = 1
T J >= 170°C T J <=145°C
Channel 2 T IMEOUT Expired
Thermal Shutdown
V OUT1 =ON
V OUT2 =OFF
PG = 1
T IMEOUT
Expired
Channel 2
Over-current
V OUT1 =ON
V OUT2 =OFF
PG = 1
TIMEOUT=1
I OUT2 >=I LIM2
For>=10 ms
Normal
F SW is programmed
I LM1 , I LM2 are programmed
V OUT1 and V OUT2 t ss = 1
V OUT1 = ON
V OUT2 = ON
PG = 0
T IMEOUT T IMEOUT
Expired Expired
V OUT2 V OUT1
Short-circuit Short-circuit
V OUT1 =ON V OUT1 =OFF
V OUT2 =OFF V OUT2 =ON
PG = 1 PG = 1
TIMEOUT=1 TIMEOUT=1
I OUT1 >=I SHORT1
I OUT2 >=I SHORT2
Figure 5. Operation Modes Diagram
V OUT1
Over-voltage
V OUT1 =ON
V OUT2 =ON
PG = 1
T J <=145°C
Channel 1
Thermal Shutdown
V OUT1 =OFF
V OUT2 =ON
Expired PG = 1
Channel 1
Over-current
V OUT1 =OFF
V OUT2 =ON
PG = 1
TIMEOUT=1
For>=10 ms
MODES OF OPERATION
The 34717 has two primary modes of operation:
Normal Mode
In Normal mode, all functions and outputs are fully
operational. To be in this mode, the V IN needs to be within its
operating range, Shutdown input is high, and no faults are
present. This mode consumes the most amount of power.
Shutdown Mode
In this mode, activated by pulling the SD pin low, the chip
is in a shutdown state and the output is disabled and
discharged. In this mode, the 34717 consumes the least
amount of power since almost all of the internal blocks are
disabled.
START-UP SEQUENCE
When power is first applied, the 34717 checks the status
of the SD pin. If the device is in a shutdown mode, no block
will power up and the output will not attempt to ramp. Once
the SD pin is set to high, the V DDI internal supply voltage and
the bias currents will be established, so the internal V DDI POR
signal can be released. The rest of the internal blocks will be
enabled and the buck converter switching frequency and soft
start timing values are determined by reading the FREQ,
ILIM1, and ILIM2 pins. A soft start cycle is then initiated to
ramp up the output of the buck converter. The first channel
uses an internal 0.7 V reference for its error amplifier while
the second channel’s error amplifier uses the voltage on the
VREFIN pin as its reference voltage until V REFIN is equal to
0.7 V, then the error amplifier defaults to the internal 0.7 V
reference voltage. This method allows the second output to
achieve multiple tracking configurations as will be explained
later in this document.
Soft start is used to prevent the output voltage from
overshooting during startup. At initial startup, the output
capacitor is at zero volts; V OUT = 0 V. Therefore, the voltage
across the inductor will be PV IN during the capacitor charge
phase which will create a very sharp di/dt ramp. Allowing the
inductor current to rise too high can result in a large
difference between the charging current and the actual load
34717
Analog Integrated Circuit Device Data
16
Freescale Semiconductor
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